@@ 1,5 1,5 @@ 
 \chapter{Step-by-step Instructions}
-This section includes detailed list of steps I took while soldering the
+This section includes a detailed list of steps I took while soldering the
 components on the stripboard.  The steps are a bit tedious by checking that
 everything works in small increments.  These small steps make it easier to
 find faults sooner and minimize the risk of damage to any of the components.

          
@@ 77,7 77,7 @@ middle of each range.
 \checkfollow
 	\begin{enumerate}
 		\item Vcc is 3.3V, current draw is less than 25mA
-		\item The R17/R18 node has attenuated DAC output signal
+		\item The R17/R18 node has the attenuated DAC output signal
 		\item The R19/R20 node has the attenuated DAC output shifted
 			to be centered around approximately 2.35V
 	\end{enumerate}

          
@@ 95,8 95,8 @@ middle of each range.
 \checkfollow
 	\begin{enumerate}
 		\item Vcc is 3.3V, current draw is less than 25mA
-		\item Adjust RV2 until the audio output (C7) has the correct
-			level
+		\item The audio output (C7) has the correct level, 
+			adjust RV2 as necessary
 	\end{enumerate}
 \end{enumerate}
 

          
@@ 131,5 131,5 @@ middle of each range.
 	\item Connect between 5.5V and 9V to the U3 input
 	\item Check that the power supply input is drawing between 14 and
 		21mA.
-	\item Check that audio output and PTT signals within expected ranges
+	\item Check that audio output and PTT signals are within expected ranges
 \end{enumerate}

          

@@ 26,7 26,7 @@ least a day and ideally would last at le
 weekend-long hunt.
 
 \paragraph{Modes of operation.}
-Many low-power foxes produce programmable tone pattern and a Morse code
+Many low-power foxes produce a programmable tone pattern and a Morse code
 identification to comply with the regulations.  There is no technical reason
 the fox firmware could not generate complex tone patterns based on
 mathematical expressions.  This apporach can create very complex patterns

          

@@ 31,7 31,7 @@ U3, an LM317, provides a stable 3.3V vol
 When using the Baofeng interface circuit, the PTT signal output by the
 microcontroller is fed into the Q2 MOSFET's gate to ground the PTT pin on
 the radio's 3.5~mm connector.  The ground, PTT, and audio connections to the
-radio use a toroids L1--3 to suppress any RF coming back from the radio.
+radio use toroids L1--3 to suppress any RF coming back from the radio.
 
 \section{Power Supply}
 \label{sec:voltage}

          
@@ 92,7 92,7 @@ There are two major timing requirements:
 	\item The microcontroller needs to run fast enough to have enough
 		time to calculate and output the next sample.
 	\item The microcontroller needs to output the samples at as close to
-		the correct sample rate.
+		the correct sample rate as possible.
 \end{enumerate}
 
 To be able to produce audio up to 8kHz, we must output samples at at least

          
@@ 128,7 128,7 @@ To have ample room for future expansion,
 accurately 8.388608MHz.
 
 This ($2^{23}$Hz) divides nicely by the 16384Hz sample rate, providing 512
-cycles per sample to compute and output of the sample via SPI.
+cycles per sample to compute and output the sample via SPI.
 % TODO: reference 29\% max duty measured
 
 % the microcontroller & crystal schematic

          
@@ 156,12 156,12 @@ Recall that the microcontroller runs at 
 16384 samples per second.  This gives it 512 clock cycles per sample.
 
 In the fastest configuration, the SPI hardware in the microprocessor can
-output data at half the clock speed, so if there was zero processing and it
+output data at half the clock speed, so if there were zero processing and it
 just shifted out samples as fast as it could, it would be limited to 32
 bytes/sample.
 
 Some time is needed to generate the sample, so if I allot 75\% to
-computation and 25\% to output, I can only do 8 bytes/period.  A typical SPI
+computation and 25\% to output, I can only do 8~bytes/period.  A typical SPI
 DAC IC uses something like 2-3 bytes to output a sample.  This is
 uncomfortably close to not having enough time to calculate the sample.
 

          
@@ 175,11 175,11 @@ just output the values as they show up. 
 specialized, cost a couple of dollars each, and many of the common ones are
 currently (2022) back-ordered.
 
-A sufficient performance can be achieved with a shift register and a R2R
+Sufficient performance can be achieved with a shift register and a R2R
 network of resistors, which are common, dirt cheap, and available.  As a
 bonus, the design is actually more extensible as well.  That is, it is
 possible to wire up a second shift register in series and extend the output
-from 8-bits to up to 16-bits trivially\footnote{Component tolerances will
+from 8~bits to up to 16~bits trivially\footnote{Component tolerances will
 likely make it far from trivial to get the 15.3$\mu$V steps required for a
 16-bit DAC, and therefore overall it is unlikely to be a trivial design.
 However, 10-bit DAC should be quite doable.}.

          
@@ 202,9 202,9 @@ rate and not the DAC resolution.
 
 The output of the DAC is fed into a emitter-follower amplifier acting as a
 buffer.  A discrete transistor is used instead of an opamp because commonly
-available op-amps do not have the necessary range at 3.3V or do not operate
-at all at such a low supply voltage.  Specialty rail-to-rail op-amps exist,
-but they are harder to source and command a higher price tag.
+available opamps do not have the necessary range at 3.3V or do not operate
+at all at such a low supply voltage.  Specialty rail-to-rail opamps exist,
+but they are harder to source and command a higher price.
 
 For example, both the TL074 and the LM324 fail to meet our requirements.
 %

          
@@ 266,10 266,11 @@ 10nF capacitor gets us close:
 	= 7.234~\textrm{kHz}
 \end{align}
 
-Being almost 800~Hz below the ideal cutoff is ok in this case because RC
-filters have a very slow rolloff.  Therefore, the attenuation at 8~kHz isn't
-anywhere near enough to worry about it---especially since the vast majority
-of the signal will be at frequencies much lower than this extreme.
+Being almost 800~Hz below the ideal cutoff is acceptable in this case
+because RC filters have a very slow rolloff.  Therefore, the attenuation at
+8~kHz isn't anywhere near enough to worry about it---especially since the
+vast majority of the signal will be at frequencies much lower than this
+extreme.
 
 To be more explicit about the attenuation, the RC filter forms a voltage
 divider.  The impedance of the capacitor at 8~kHz is:

          
@@ 313,13 314,13 @@ pin.
 \end{center}
 
 A 2N7000 MOSFET is cheap and easy to obtain and therefore an obvious choice
-for the PTT transistor.  The only only potential issue with it is its
+for the PTT transistor.  The only potential issue with it is its
 $V_{GS(th)}$.  According to the datasheet, the typical value is 2.1V and the
 maximum is 3V.  This is a bit close when using 3.3V logic.
 
 Worst case, one can always measure the threshold voltage of a particular
 transistor during assembly to ensure its performance is acceptable.
 
-Finally, each of the three connections to the radio (audio, PTT, ground) use
-a ferrite choke to suppress RF coming from the radio from entering the fox
-circuit.
+Finally, each of the three connections to the radio (audio, PTT, ground)
+uses a ferrite choke to prevent RF coming from the radio from entering the
+fox circuit.

          

@@ 20,36 20,36 @@ how the various on-chip components inter
 
 \section{Execution Flow}
 \label{sec:mainloop}
-Overall, the firmware is very interrupt centric.  After the post-poweron
+Overall, the firmware is very interrupt-centric.  After the post-poweron
 startup code initializes the microcontroller as needed, the execution stops
 by using the \texttt{sleep} instruction.  From that point on, all code that
 executes is in the interrupt handler function.
 
 The timer1 comparator A is configured to fire 16384~times per second (see
-section~\ref{sec:timing}) and each time the it fires the interrupt handler:
+section~\ref{sec:timing}) and each time it fires, the interrupt handler:
 
 \begin{enumerate}
 	\item Outputs the previous sample
 	\item Generates the next sample and stores it for the next interrupt
 \end{enumerate}
 
-This one sample delay has two major benefits (1) it allows the output of the
+This one sample delay has two major benefits: (1) it allows the output of the
 sample via SPI to occur with exactly the same latency since the start of the
 interrupt reducing jitter, and (2) it allows more complete overlap of SPI
 output with computation enabling more complex calculations.
 
 \section{Wave Generation}
 \label{sec:wavegen}
-The firmware contains a 256-entry look up table of a sine wave.  If the code
+The firmware contains a 256-entry lookup table of a sine wave.  If the code
 were to step through this table one entry per sample, it would generate a
 64Hz sine wave ($\frac{16384}{256}$).  To get higher frequency tones, the
-code steps through the sine wave look up table at a faster rate.  For
+code steps through the sine wave lookup table at a faster rate.  For
 example, a 128Hz tone can generated by skipping every other entry in the
 table.
 
 While trivial to implement, this scheme has a serious downside---only
 frequencies that are an integer multiple of 64Hz can be generated.  This is
-ok with modes such as the Morse code ident, but will likely make melodic
+fine with modes such as the Morse code ident, but will likely make melodic
 tone patterns sound out of tune\footnote{The plan is to address this
 limitation in revision~B.}.
 

          
@@ 99,7 99,7 @@ The parameters are:
 		However, if set to 30 seconds with a 35 second transmission,
 		then the fox will transmit for 35 seconds, wait 25 seconds
 		off-air, and then start the transmit cycle again.  This is
-		identical behavior as if the inter-transmission time was set
+		the same as if the inter-transmission time was set
 		to 60 seconds.
 \end{description}
 

          

@@ 4,14 4,14 @@ 
 \includegraphics[width=0.9\linewidth]{figures/stripboard.pdf}
 \end{center}
 
-The above image shows the layout and all connections on the single sided 7cm
+The above image shows the layout and all connections on the single-sided 7cm
 by 9cm stripboard with 26 by 34 holes I used for the main circuit and power
 supply.
 
-I put the Baofeng interface on a separate protoboard to make it more future
-proof.  Note that unlike the strip board, the proto board does \emph{not}
-have any of the holes connected and all the connections have to be created
-with jumpers.
+I put the Baofeng interface on a separate protoboard to make it more
+future-proof.  Note that unlike the stripboard, the protoboard does
+\emph{not} have any of the holes connected and all the connections have to
+be created with jumpers.
 
 \begin{center}
 \includegraphics[width=0.3\linewidth]{figures/stripboard-iface.pdf}