M arch/atmega48p_i2c.h +2 -0
@@ 26,9 26,11 @@
#define I2C_STATUS_START REG_TWSR_STATUS_START
#define I2C_STATUS_REP_START REG_TWSR_STATUS_REP_START
#define I2C_STATUS_MT_SLA_ACK REG_TWSR_STATUS_MT_SLA_ACK
+#define I2C_STATUS_MT_SLA_NACK REG_TWSR_STATUS_MT_SLA_NACK
#define I2C_STATUS_MT_DATA_ACK REG_TWSR_STATUS_MT_DATA_ACK
#define I2C_STATUS_MT_DATA_NACK REG_TWSR_STATUS_MT_DATA_NACK
#define I2C_STATUS_MR_SLA_ACK REG_TWSR_STATUS_MR_SLA_ACK
+#define I2C_STATUS_MR_SLA_NACK REG_TWSR_STATUS_MR_SLA_NACK
#define I2C_STATUS_MR_DATA_ACK REG_TWSR_STATUS_MR_DATA_ACK
#define I2C_STATUS_MR_DATA_NACK REG_TWSR_STATUS_MR_DATA_NACK